VXIbus--A Modular Standard for Test & Measurement

Clock Bus

The clock bus provides two clocks and a clock synchronization signal. A 1OMHz clock (CLK 10) is located on P2 (for C-size cards) and a 1 OOM Hz clock (CLK 100) with a synchronization signal (SYNC100) are both on P3 (for D-size cards). All three signals are differential ECL. Both clocks and synchronization signal are sourced from the Resource Manager and individually buffered through the backplane to each module. This ensures minimal loading on the reference and keeps the signal free of jitter. Previously in rack-and-stack systems, distribution of a clock signal in such a manner would have been handled by many feet of cable introducing synchronization and buffering problems.